/*
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
*
* SPDX-License-Identifier: BSD-3-Clause
*/

/**********************************************************************************************************************
 * File Name    : mstp_iobitmask.h
 * Version      : 1.00
 * Description  : IO bit mask file for mstp.
 *********************************************************************************************************************/

#ifndef MSTP_IOBITMASK_H
#define MSTP_IOBITMASK_H

#define R_MSTP_ACPU_MXSRAM_A_Msk          (0x00000001UL)
#define R_MSTP_ACPU_MXSRAM_A_Pos          (0UL)
#define R_MSTP_MCPU1_MXSRAM_M_Msk         (0x00000001UL)
#define R_MSTP_MCPU1_MXSRAM_M_Pos         (0UL)
#define R_MSTP_MCPU1_MHSPI_Msk            (0x00000002UL)
#define R_MSTP_MCPU1_MHSPI_Pos            (1UL)
#define R_MSTP_MCPU1_MHMTU3A_Msk          (0x00000004UL)
#define R_MSTP_MCPU1_MHMTU3A_Pos          (2UL)
#define R_MSTP_MCPU1_MHSRC_Msk            (0x00000008UL)
#define R_MSTP_MCPU1_MHSRC_Pos            (3UL)
#define R_MSTP_MCPU1_MHPOE3_Msk           (0x00000200UL)
#define R_MSTP_MCPU1_MHPOE3_Pos           (9UL)
#define R_MSTP_MCPU1_MHSSIF0_Msk          (0x00000400UL)
#define R_MSTP_MCPU1_MHSSIF0_Pos          (10UL)
#define R_MSTP_MCPU1_MHRSPI0_Msk          (0x00004000UL)
#define R_MSTP_MCPU1_MHRSPI0_Pos          (14UL)
#define R_MSTP_MCPU1_MHRSPI1_Msk          (0x00008000UL)
#define R_MSTP_MCPU1_MHRSPI1_Pos          (15UL)
#define R_MSTP_MCPU2_MHSCIF0_Msk          (0x00000002UL)
#define R_MSTP_MCPU2_MHSCIF0_Pos          (1UL)
#define R_MSTP_MCPU2_MHSCIF1_Msk          (0x00000004UL)
#define R_MSTP_MCPU2_MHSCIF1_Pos          (2UL)
#define R_MSTP_MCPU2_MHSCIF2_Msk          (0x00000008UL)
#define R_MSTP_MCPU2_MHSCIF2_Pos          (3UL)
#define R_MSTP_MCPU2_MHSCIF3_Msk          (0x00000010UL)
#define R_MSTP_MCPU2_MHSCIF3_Pos          (4UL)
#define R_MSTP_MCPU2_MHSCIF4_Msk          (0x00000020UL)
#define R_MSTP_MCPU2_MHSCIF4_Pos          (5UL)
#define R_MSTP_MCPU2_MHIRDA_Msk           (0x00000040UL)
#define R_MSTP_MCPU2_MHIRDA_Pos           (6UL)
#define R_MSTP_MCPU2_MHSCI0_Msk           (0x00000080UL)
#define R_MSTP_MCPU2_MHSCI0_Pos           (7UL)
#define R_MSTP_MCPU2_MHSCI1_Msk           (0x00000100UL)
#define R_MSTP_MCPU2_MHSCI1_Pos           (8UL)
#define R_MSTP_MCPU2_MPI2C0_Msk           (0x00000400UL)
#define R_MSTP_MCPU2_MPI2C0_Pos           (10UL)
#define R_MSTP_MCPU2_MPI2C1_Msk           (0x00000800UL)
#define R_MSTP_MCPU2_MPI2C1_Pos           (11UL)
#define R_MSTP_MCPU2_MPTSU_Msk            (0x00008000UL)
#define R_MSTP_MCPU2_MPTSU_Pos            (15UL)
#define R_MSTP_PERI_COM_MXSDHI0_Msk       (0x00000001UL)
#define R_MSTP_PERI_COM_MXSDHI0_Pos       (0UL)
#define R_MSTP_PERI_COM_MPUSBT_Msk        (0x00000010UL)
#define R_MSTP_PERI_COM_MPUSBT_Pos        (4UL)
#define R_MSTP_PERI_COM_MHUSB2H_Msk       (0x00000020UL)
#define R_MSTP_PERI_COM_MHUSB2H_Pos       (5UL)
#define R_MSTP_PERI_COM_MHUSB2F_Msk       (0x00000040UL)
#define R_MSTP_PERI_COM_MHUSB2F_Pos       (6UL)
#define R_MSTP_PERI_COM_MXCOM8_Msk        (0x00000100UL)
#define R_MSTP_PERI_COM_MXCOM8_Pos        (8UL)
#define R_MSTP_PERI_COM_MXCOM9_Msk        (0x00000200UL)
#define R_MSTP_PERI_COM_MXCOM9_Pos        (9UL)
#define R_MSTP_PERI_CPU_MXMCPU_Msk        (0x00000001UL)
#define R_MSTP_PERI_CPU_MXMCPU_Pos        (0UL)
#define R_MSTP_PERI_CPU_MXACPU_Msk        (0x00000002UL)
#define R_MSTP_PERI_CPU_MXACPU_Pos        (1UL)
#define R_MSTP_PERI_CPU_MPCST_Msk         (0x00000004UL)
#define R_MSTP_PERI_CPU_MPCST_Pos         (2UL)
#define R_MSTP_PERI_CPU_MPSYC_Msk         (0x00000008UL)
#define R_MSTP_PERI_CPU_MPSYC_Pos         (3UL)
#define R_MSTP_PERI_CPU_MPCPG_Msk         (0x00000010UL)
#define R_MSTP_PERI_CPU_MPCPG_Pos         (4UL)
#define R_MSTP_PERI_CPU_MHGPIO_Msk        (0x00000040UL)
#define R_MSTP_PERI_CPU_MHGPIO_Pos        (6UL)
#define R_MSTP_PERI_CPU_MPSRAM_A_Msk      (0x00000800UL)
#define R_MSTP_PERI_CPU_MPSRAM_A_Pos      (11UL)
#define R_MSTP_PERI_CPU_MPSRAM_M_Msk      (0x00001000UL)
#define R_MSTP_PERI_CPU_MPSRAM_M_Pos      (12UL)
#define R_MSTP_PERI_CPU_MPIA55_Msk        (0x00002000UL)
#define R_MSTP_PERI_CPU_MPIA55_Pos        (13UL)
#define R_MSTP_PERI_CPU_MXREG0_Msk        (0x00008000UL)
#define R_MSTP_PERI_CPU_MXREG0_Pos        (15UL)
#define R_MSTP_PERI_DDR_MPPHY_Msk         (0x00000001UL)
#define R_MSTP_PERI_DDR_MPPHY_Pos         (0UL)
#define R_MSTP_PERI_DDR_MXMEMC_REG_Msk    (0x00000002UL)
#define R_MSTP_PERI_DDR_MXMEMC_REG_Pos    (1UL)
#define R_MSTP_PERI_VIDEO_MPDSIPHY_Msk    (0x00000020UL)
#define R_MSTP_PERI_VIDEO_MPDSIPHY_Pos    (5UL)
#define R_MSTP_PERI_VIDEO_MPDSIL_Msk      (0x00000040UL)
#define R_MSTP_PERI_VIDEO_MPDSIL_Pos      (6UL)
#define R_MSTP_PERI_VIDEO_MPVSPD_Msk      (0x00000080UL)
#define R_MSTP_PERI_VIDEO_MPVSPD_Pos      (7UL)
#define R_MSTP_PERI_VIDEO_MPCPVD_Msk      (0x00000100UL)
#define R_MSTP_PERI_VIDEO_MPCPVD_Pos      (8UL)
#define R_MSTP_PERI_VIDEO_MPDU_Msk        (0x00000200UL)
#define R_MSTP_PERI_VIDEO_MPDU_Pos        (9UL)
#define R_MSTP_PERI_VIDEO_MXVIDEO_Msk     (0x00000400UL)
#define R_MSTP_PERI_VIDEO_MXVIDEO_Pos     (10UL)
#define R_MSTP_REG0_MPWDT0_Msk            (0x00000004UL)
#define R_MSTP_REG0_MPWDT0_Pos            (2UL)
#define R_MSTP_REG0_MPOSTM0_Msk           (0x00000010UL)
#define R_MSTP_REG0_MPOSTM0_Pos           (4UL)
#define R_MSTP_REG0_MPOSTM1_Msk           (0x00000020UL)
#define R_MSTP_REG0_MPOSTM1_Pos           (5UL)
#define R_MSTP_REG0_MPOSTM2_Msk           (0x00000040UL)
#define R_MSTP_REG0_MPOSTM2_Pos           (6UL)
#define R_MSTP_REG1_MXDMAC_S_Msk          (0x00000001UL)
#define R_MSTP_REG1_MXDMAC_S_Pos          (0UL)
#define R_MSTP_REG1_MPDMAC_S_Msk          (0x00000002UL)
#define R_MSTP_REG1_MPDMAC_S_Pos          (1UL)
#define R_MSTP_REG1_MXDMAC_NS_Msk         (0x00000004UL)
#define R_MSTP_REG1_MXDMAC_NS_Pos         (2UL)
#define R_MSTP_REG1_MPDMAC_NS_Msk         (0x00000008UL)
#define R_MSTP_REG1_MPDMAC_NS_Pos         (3UL)
#define R_MSTP_REG1_MXGIC_Msk             (0x00000080UL)
#define R_MSTP_REG1_MXGIC_Pos             (7UL)

#endif                                 /* MSTP_IOBITMASK_H */
